SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP

DESCRIPTION

The U74LVC1G80 is a single positive-edge-triggered D-type

flip-flop is designed for 1.65V to 5.5V VCC operation.

When data at the data (D) input meets the setup time

requirement, the data is transferred to the  Q output on the

positive-going edge of the clock pulse. Clock triggering occurs at a

voltage level and is not directly related to the rise time of the clock

pulse. Following the hold-time interval, data at the D input can be

changed without affecting the level at the output.

This device is fully specified for partial-power-down applications

using IOFF. The IOFF circuitry disables the outputs, preventing

damaging current backflow through the device when it is powered

down.

FEATURES

* Operate from 1.65V to 5.5V

* Inputs accept voltages to 5.5V

* IOFF supports partial-power-down mode

* Low power dissipation: ICC=10μA (Max.)

* ±24mA output drive(VCC=3.3V)