8-BIT SHIFT REGISTER WITH 3-STATE OUTPUT REGISTERS

DESCRIPTION

The UTC 74AHC595 contains an 8-bit serial-in, parallel-out shift

register that feeds an 8-bit D-type storage register. The storage

register has parallel 3-state outputs. Separate clocks are provided

for both the shift and storage registers. The shift register has a direct

overriding clear ( SRCLR ) input, serial (SER) input, and a serial

output for cascading. When the output-enable ( OE ) input is high, all

outputs, except QH’, are in the high-impedance state.

Both the shift-register clock (SRCLK) and storage-register clock

(RCLK) are positive-edge triggered. If both clocks are connected

together the shift register always is one clock pulse ahead of the

storage register.

FEATURES

* Operation Voltage Range: 2 ~ 5.5V

* Shift Register Has Direct Clear

* 8-bit Serial-In, Parallel-Out Shift