SINGLE D-TYPE FLIP-FLOP  WITH ASYNCHRONOUS CLEAR

DESCRIPTION

The U74LVC1G175 is single D-type flip-flop is designed for

1.65V to 5.5V VCC operation.

The U74LVC1G175 device has an asynchronous clear ( CLR )

input. When CLR is high, data from the input pin (D) is transferred

to the output pin (Q) on the clock's (CLK) rising edge. When CLR

is low, Q is forced into the low state, regardless of the clock edge or

data on D.

This device is fully specified for partial-power-down applications

using IOFF. The IOFF circuitry disables the outputs, preventing

damaging current backflow through the device when it is powered

down.

FEATURES

* Wide supply voltage range from 1.65V to 5.5V

* Inputs accept voltages up to 5.5V

* IOFF supports partial-power-down mode

* Low static power consumption; ICC=10μA (Max.)