CMOS 8-STAGE STATIC SHIFT REGISTERS
DESCRIPTION
The UCD4021B is a 8-stage synchronous parallel or serial
input/serial output registers having common CLOCK and
PARALLEL/SERIAL CONTROL inputs, a SERIAL data input, and
individual parallel inputs to each register stage. Each register is a
D-type, master-slave flip-flop. Q6, Q7, and Q8 are outputs. In
UCD4021 serial entry is synchronous with the clock but parallel entry
is asynchronous.
In UCD4021 serial entry is controlled by the PARALLEL/SERIAL
CONTROL input. When the PARALLEL/SERIAL CONTROL input is
low, data is serially shifted into the 8-stage register synchronously with
the positive transition of the clock line. When the PARALLEL/SERIAL
CONTROL input is high, asynchronous parallel entry is made and the
CLOCK input of the internal stage is isolated.
FEATURES
* Up to 20V operation voltage
* 12MHz (Typ.) clock rate at 10V
* Maximum input current of 1μA at 18V
* Fully static operation
* 8 master-slave flip-flops plus output buffering and control gating |
