8-STAGE SHIFT&STORE BUS REGISTER
DESCRIPTION
The U74HCT4094 consists of an 8-stage shift register and 8-stage D-type latch with 3-stage parallel outputs. Data is shifted serially through the shift register on the positive going transition of the clock input singal. The output of the last stage QS1 can be used to cascade several devices.
The output of QS1 is transferred to a second output(QS2) on the following negative transition of the clock input singal. The data of each stage of the shift register is provided with a latch which latches data on the negative going transition of the Strobe input
signal. When the strobe input is held high, data propagates through the latch to a 3-state output buffer.
The buffer is enabled when Output Enable input is taken high.
FEATURES
* Operate from 4.5V to 5.5V
* Low Input Current: 0.1μA
* High Noise Immunity Characteristic of CMOS Devices
* Inputs are TTL Voltage Compatible. |