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Home > DDR Termination Regulators
UR6515A Datasheet

3A DDR BUS TERMINATION REGULATOR
 



DESCRIPTION
 
The UR6515A is a linear regulator providing up to 3A
transient peak current sourcing and sinking capability for DDR
SDRAM bus terminator applications while regulating an output
voltage to within 40mV. It contains a high speed operational amplifier
which provides fast load transient response and only requires 10uF
of ceramic output capacitance.
The UR6515A output termination voltage tracks the reference
voltage applied at VREF pin. A resistor divider connected to VIN, GND
and VREF pins is used to force the reference voltage to VREF pin.
Additional features include current limiting protection and thermal shutdown protection.
 

 
FEATURES
 
*DDR1/ DDR2 termination voltage applications
*Low output voltage offset within 20mV
*Source and sink 3A peak current
*Adjustable output voltage by external resistors
*Integrated power MOS devices
*Suspend to RAM(STR) functionality
*Current Limiting Protection
*Thermal Shutdown Protection
*Cost-effective and easy to use
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